1. Field of the Invention
The present invention relates to an abnormal data transmission detection circuit applicable to a time-division multiplex data transmission network system.
2. Description of the Prior Art
A conventional abnormal data transmission detection circuit is exemplified by a Japanese Patent Application Unexamined Open No. Sho. 51-67013 published on June 10, 1976.
In the above-identified Japanese Patent Application document, the abnormal transmission detection circuit is connected between a power supply such as a battery and clock generator constituting a time-division multiplex transmission network system. The clock generator outputs a clock pulse to a clock signal transmission line. A plurality of data transmitters and receivers are interconnected via a data transmission line, and each of the data transmitters and receivers receives the power supply via a power supply line and abnormal transmission detection circuit from the power supply and the clock pulse via the clock signal transmission line from the clock generator. The abnormal transmission detection circuit monitors the presence or absence of abnormality in transmission states of the connected clock signal and data transmission lines. The abnormal transmission detection circuit comprises a smoothing circuit including a capacitor and resistor and if a short-circuit or open-circuit occurs, the smoothing circuit receives a constant voltage so that a transistor connected to the smoothing circuit turns on and alarm unit connected to the transistor is actuated to produce an alarm and the power supply line is disconnected. However, in this case, the abnormal transmission detection circuit often erroneously detect the abnormality on the data transmission line while no signal is transmitted on the data transmission line.
In addition, since in the abnormal data transmission detection circuit having another construction a time interval between consecutive pulses transmitted sequentially on the same signal transmission line compares with a reference time determined by a time constant of a capacitor-and-resistor (CR) circuit in order to detect the data transmission abnormality due to a short circuiting or open-circuit of the line or failure in any transmitter or receiver, a time required for the detection of abnormality becomes longer and a capacitor having a high capacity becomes necessary so that it becomes difficult to integrate the detection circuit in an Integrated Circuit form, in a case when the data abnormal transmission detection circuit is applied to a multichannel time-division multiplex transmission network system in which the time interval between consecutively transmitted pulses can often become considerably longer even when the normal data transmission and reception are carried out between a pair of data transmitter and data receiver in one channel.